1. Field of the Invention
This invention relates to electronic circuits and systems. More particularly, this invention relates to circuits that generate biasing currents for circuits. This invention, especially, relates to circuits that generate biasing currents that provide variations in these biasing currents to compensate for functional circuit variations due to changes in operating temperature of the functional circuits.
2. Description of Related Art
Presently designed analog circuits generally employ current biasing rather than voltage biasing. Current biasing, firstly, allows the operating points of the transistors to be relatively independent of the fabrication process parameters. Secondly, current biasing is less prone to noise pickup. Thirdly, the temperature coefficient of the biasing current can be easily altered to provide temperature compensation to some of the small signal parameters, particularly, transconductance (gm) of transistors. For the purpose of current biasing, a current master-bias circuit is usually employed. However, the slope of the temperature characteristic of the bias current from the master-bias circuit might have to be different for different circuits and even for the same circuit using different fabrication processes, if reasonably precise temperature compensation is required. Therefore, a master-bias current circuit must be able be easily adaptable to provide different characteristics for the bias current.
A Proportional To Absolute Temperature (PTAT) current generator as shown in FIG. 1 is very widely used as a temperature compensated current master-bias circuit. The NPN bipolar transistors Q1 and Q2, resistor R1, and an active current mirror circuit CM1 form the PTAT current generator. The current mirror circuit CM1 forces the collector currents of transistors Q1 and Q2 to be equal which is shown as IC1 and IC2. If the small base current of Q1 is ignored, it can be shown that the collector currents IC1 and IC2 of transistors Q1 and Q2 is determined by the equation:                               I          C1                =                              I            C2                    =                                                    V                                  be                  Q2                                            -                              V                                  be                  Q1                                                                    R              1                                                          Eq        .                  xe2x80x83                ⁢        1            
where:
VbeQ1 and VbeQ2 are the voltages developed between the base and emitter respectively of the transistors Q1 and Q2.
R1 is the resistance of the resistor R1.
It is known that the base emitter voltages VbeQ2 and VbeQ1 of the transistors Q1 and Q2 are determined by the equation:                               V          be                =                              V            T                    ⁢                      ln            ⁡                          (                                                I                  C                                                                      J                    S                                    ⁢                  A                                            )                                                          Eq        .                  xe2x80x83                ⁢        2            
where:
VT is a thermal voltage given by the equation:                               V          T                =                  kT          q                                    Eq        .                  xe2x80x83                ⁢        3            
xe2x80x83where:
k is Boltzmann""s constant,
T is the operating temperature of the transistor generally in degrees Kelvin, and
q is the electrical charge of an electron.
IC is the collector current of an NPN transistor.
JS is the saturation current density per unit area.
A is the emitter area.
By substituting Eq. 2 and Eq. 3 into Eq. 1, it can be shown that the collector currents IC1 and IC2 of transistors Q1 and Q2 are equal to:                                                                         I                C1                            =                                                I                  C2                                =                                  xe2x80x83                                ⁢                                                                                                    V                        T                                                                    R                        1                                                              ⁢                                          ln                      ⁡                                              (                                                                              I                            C2                                                                                                              J                              S                                                        ⁢                                                          A                              2                                                                                                      )                                                                              -                                      ln                    ⁡                                          (                                                                        I                          C1                                                                                                      J                            S                                                    ⁢                                                      A                            1                                                                                              )                                                                                                                                              =                              xe2x80x83                            ⁢                                                                                          V                      T                                                              R                      1                                                        ⁢                                      ln                    ⁡                                          (                                                                        A                          2                                                                          A                          1                                                                    )                                                                      =                                  AV                  T                                                                                        Eq        .                  xe2x80x83                ⁢        4            
If the current mirror CM1 is designed such that the MOS transistors M1, M2, and M3 are of equal sizes, then the PTAT current IPTAT is equal to collector currents IC1 and IC2 and is given by the equation:
IPTAT=AVTxe2x80x83xe2x80x83Eq. 5
where:   A  =            1              R        1              ⁢          ln      ⁡              (                              A            2                                A            1                          )            
and is the constant simplified from the terms of Eq. 4.
VT is the thermal voltage of Eq. 3.
FIG. 2 shows the temperature behavior of the PTAT current IPTAT versus temperature. The constant   A  ⁢      k    q  
is the slope of the line. This kind of linear characteristic is usually very effective for providing temperature compensation for Bipolar transistors.
The transconductance gmbip for a bipolar transistor is given by:                               g          mbip                =                              I            C                                V            T                                              Eq        .                  xe2x80x83                ⁢        6            
where,
IC is the collector current.
If a bipolar transistor is biased by a PTAT current IPTAT, the PTAT current IPTAT found in Eq. 5 is substituted for the collector current IC in Eq. 6, the transconductance gmbip of the bipolar transistor becomes:
gmbip=A.xe2x80x83xe2x80x83Eq. 7
Thus the PTAT current generator effectively forces the transconductance of the bipolar transistor to be constant over temperature.
Conversely, for MOS transistors in strong-inversion, the PTAT current generator does not provide an effective temperature compensation. The transconductance gmMos of a MOS transistor is given by the equation:                               g          mMOS                =                              2            ⁢                          I              D                        ⁢            μ            ⁢                          xe2x80x83                        ⁢                          C              OX                        ⁢                          W              L                                                          Eq        .                  xe2x80x83                ⁢        8            
where:
ID is the drain current of the MOS transistor.
COX is the gate oxide capacitance per unit area of the MOS transistor.
W/L the aspect ratio of the MOS transistor
xcexc the carrier mobility given by the equation:
xcexc=BTxe2x88x92m
xe2x80x83where:
B is a constant.
m is a process dependent exponent that has a typical value of 1.5.
T is temperature in degrees Kelvin.
If a MOS transistor is biased by a PTAT current IPTAT, the PTAT current IPTAT found in Eq. 5 is substituted for the drain current ID in Eq. 8, the transconductance gmMos of the MOS transistor is found by the equation:                               g          mMOS                =                                                            2                ⁢                                  kABWC                  OX                                            qL                                ⁢                      T                                          1                -                m                            2                                                          Eq        .                  xe2x80x83                ⁢        9            
It is known in the art the process dependent exponent m is not easily controllable and is almost never has a magnitude of 1. Thus it becomes obvious from Eq. 9 that the transconductance gmMos has a level of temperature dependence even if biased with a PTAT current IPTAT 
U.S. Pat. No. 6,157,245 (Rincon-Mora) describes a curvature corrected bandgap reference voltage circuit, the output voltage that is substantially linear and independent of the operating temperature of the circuit. The circuit includes a voltage divider network comprised of a first resistor and a second resistor connected in series. A first compensating circuit provides a first, linear, operating temperature-dependent current, and a second compensating circuit provides a second, logarithmic, operating temperature-dependent current. The first current is supplied to the first resistor of the voltage divider network, while the second current is supplied to the second resistor of the voltage divider network.
U.S. Pat. No. 5,952,873 (Rincon-Mora) illustrates a low voltage, current-mode, piecewise-linear curvature corrected bandgap reference circuit. The bandgap circuit includes a first current source supplying a current proportional to a base-emitter voltage, a second current source supplying a current proportional to absolute temperature, and a third current source supplying a non-linear current. Three resistors are coupled in series between a first node and ground. The first current source is coupled to the first node. The second current source is coupled to a second node between the first and second resistors. The third current source is coupled to a third node between the second and third resistors. An output coupled to the first node supplies a reference voltage.
U.S. Pat. No. 5,883,507 (Yin) describes a low power temperature compensated, current source. The current source creates a first reference current and a temperature compensating voltage-controlling circuit generates a temperature compensated voltage control signal during temperature variations. A bias controlling circuit is connected to the current generating circuit and the temperature compensating voltage control circuit to bias the temperature compensating voltage control circuit. A current output controlling circuit is connected to the current generating circuit and the temperature compensating voltage controlling circuit for controlling a second temperature compensated reference current to generate a high output source current even during low temperature conditions.
U.S. Pat. No. 5,796,244 (Chen et al.) teaches a voltage reference circuit that will remain constant and independent of changes in the operating temperature that is correlated to the bandgap voltage of silicon is described. The voltage reference circuit will be incorporated within an integrated circuit and will minimize currents into the substrate. The bandgap voltage reference circuit has a bandgap voltage referenced generator that will generate a first referencing voltage having a first temperature coefficient, and a compensating voltage generator that will generate a second referencing voltage having a second temperature coefficient. The second temperature coefficient is approximately equal to and has an opposite sign to the first temperature coefficient. A voltage summing circuit will sum the first referencing voltage and the second referencing voltage to create the temperature independent voltage. A voltage biasing circuit will couple a bias voltage to the bandgap voltage referenced generating means to bias the bandgap voltage referenced generator to generate the first referencing voltage.
U.S. Pat. No. 6,191,646 (Shin) teaches a temperature-compensated high precision current source, which provides a constant current regardless of temperature change. The temperature-compensated high precision current source has a control circuit connected to a voltage supply for producing control signal. A first current generating circuit generates a first current, which is proportional to absolute temperature in response to the signals from the control circuit. A first current transferring circuit transfers the first current to a common node. A second current generating circuit generates a second current, which is inversely proportional to absolute temperature in response to the signals from the control circuit. A second current transferring circuit transfers the second current to the common node. The common node adds the first and second currents to generate a third current that is compensated for a current variation caused by the temperature variation at the first and second current generating circuits. An output circuit is connected to the common node for receiving the third current from the common node and generating a constant output current.
An object of this invention is to provide a circuit that generates a master biasing current that has a unique variation with changes in temperature.
Another object of this invention is to provide a circuit that generates a master biasing current and biasing currents mirrored from the master biasing current such that the master biasing current and the mirrored biasing currents have unique variation with changes in temperature.
To accomplish at least one of these as well as other objects, a temperature compensating biasing circuit is constructed by first determining a piecewise function substantially describing a required bias current with respect to temperature. Reference signals are created such that each reference signal describes an amount of a contributing current of a plurality of contributing currents. The selected contributing currents, when summed together, generate the master biasing current. The biasing current generator is further constructed to create a thermal signal, such that the magnitude of the thermal signal indicates a temperature of the functional circuit to which the biasing currents are supplied. Each of the reference signals is compared to the thermal signal. The biasing current generator then identifies which of the contributing currents or portions of the contributing currents are being included to generate the master biasing current. The identified contributing currents and the portions of the contributing currents are then summed to form the master biasing current.
To accomplish the function as above described, the temperature compensating bias current generator has a temperature-to-current converter to provide a thermal signal indicating a temperature value of current and a current function generator in communication with the temperature-to-current converter to multiply the thermal signal by a bias function having the unique temperature characteristics to create the master biasing current. The temperature-to-current converter has a temperature independent current source, a proportional-to-absolute-temperature current source, and a current difference circuit. The temperature independent current source provides a first current that does not fluctuate with a change in temperature. The proportional-to-absolute-temperature current source provides a second current that varies by a known function (generally linear) with temperature. The current difference circuit is connected to the temperature independent current source and the proportional-to-absolute-temperature current source to receive the first and second currents and from the first and second currents generates the thermal signal. The thermal signal is indicative of a difference between the first and second currents, which a current measure of the temperature.
The current function generator is in communication with the temperature-to-current converter to receive the thermal signal. The thermal signal is compared with the reference signals to determine which of the contributing currents or portions of the contributing currents indicated by the reference signals are to be added to form the master biasing current. The reference signals are generated by a bandgap voltage generator and are chosen to determine the bias function.
The master biasing current may be used as the reference current for a plurality of mirrored current sources that provide a plurality of bias currents that have the temperature compensation bias function as determined by the master biasing current.
The current difference circuit includes a current subtractor circuit. The current subtractor circuit is in communication with the temperature independent current source and the proportional-to-absolute-temperature current source to receive the first and second currents and to subtract the first and second to generate a thermal current. A signal converter is connected to the current subtractor to receive the thermal current and convert the thermal current to the thermal signal.
The current function generator comprises a current multiplier in communication with the temperature-to-current converter to receive the thermal signal, compare the thermal signal with the reference signals to determine a contributing currents indicated by the reference signals to be added to form the master biasing current. The current multiplier is formed of a plurality of current steering circuits, each current steering circuit comparing the thermal current difference signal to one of the plurality of reference signals to selectively steer all or some of one of the contributing currents to an output node. The current steering circuits are all connected to a current summing node to additively combine the selectively steered contributing currents to form the master biasing current.
Each current steering circuit has a first and second MOS transistor. The first MOS transistor has a gate to receive the thermal signal, and a drain connected to a voltage reference terminal, and the a second MOS transistor has a gate to receive one of the reference signals, and a drain connected to the current summing node to provide some or all of the contributing current. A first current source is in communication with a source of the first MOS transistor to provide some or all a first portion of the contributing current, and a second current source is in communication with a source of the second MOS transistor to provide some or all a second portion of the contributing current. A resistor is connected between the sources of the first and second MOS transistors such that some or all of the first and second portions or the contributing current selectively flow through the first or second MOS transistor.
The current steering circuit adjusts the contributing current such that, if the thermal signal has a magnitude between a sum and a difference of the reference signal at the gate of the second MOS transistor and a signal developed at the resistor, an amount of the contributing current transferred to the output node is determined by the equation:       I    y    =            I      1        +                            V          c                -                  V          R1                    R      
where:
Iy is the amount of the contributing current,
I1 is a magnitude of the first portion of the contributing current,
VC is the thermal signal,
VR1 is the reference signal, and
R is the resistance of the resistor.
However, each current steering circuit adjusts the current steering current such that, if the thermal signal has a magnitude that is less than the difference of the reference signal at the gate of the second MOS transistor and the signal developed at the resistor, the amount of the contributing current transferred to the output node is zero. Finally each current steering circuit adjusts the contributing current such that, if the thermal signal has a magnitude greater than the sum of the reference signal at the gate of the second MOS transistor and the signal developed at the resistor, the amount of the contributing current transferred to the output node is a sum of the first and second portions of the contributing current.